Landtiger LPC1768 C BigLib 1
A self made, custom C library for the LandTiger board.
 
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timer.c
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1#include "timer.h"
2#include "power.h"
3#include <LPC17xx.h>
4
5#include <stdlib.h>
6
7// PRIVATE FUNCTIONS for MATCH REGISTERS
8
9_PRIVATE void set_match_reg(LPC_TIM_TypeDef *const timer, const TIMER_MatchRegister match_reg)
10{
11 switch (match_reg.which)
12 {
13 case 0:
14 timer->MR0 = match_reg.match;
15 break;
16 case 1:
17 timer->MR1 = match_reg.match;
18 break;
19 case 2:
20 timer->MR2 = match_reg.match;
21 break;
22 case 3:
23 timer->MR3 = match_reg.match;
24 break;
25 }
26
27 timer->MCR |= match_reg.actions << (3 * match_reg.which);
28}
29
30_PRIVATE void unset_match_reg(LPC_TIM_TypeDef *const timer, const TIMER_MatchRegister match_reg)
31{
32 switch (match_reg.which)
33 {
34 case 0:
35 timer->MR0 = 0;
36 break;
37 case 1:
38 timer->MR1 = 0;
39 break;
40 case 2:
41 timer->MR2 = 0;
42 break;
43 case 3:
44 timer->MR3 = 0;
45 break;
46 }
47
48 timer->MCR &= ~(match_reg.actions << (3 * match_reg.which));
49}
50
51_PRIVATE void clear_match_regs(LPC_TIM_TypeDef *const timer)
52{
53 timer->MR0 = 0;
54 timer->MR1 = 0;
55 timer->MR2 = 0;
56 timer->MR3 = 0;
57 timer->MCR = 0;
58}
59
60// FUNCTIONS
61
62void TIMER_Init(TIMER *timer, u8 which, u32 prescaler, u8 int_priority)
63{
64 if (!timer)
65 return;
66
67 bool valid_prio = !IS_DEF_PRIORITY(int_priority) && IS_BETWEEN_EQ(int_priority, 0, 15);
68 bool valid_prescaler = !IS_NO_PRESCALER(prescaler);
69
70 switch (which)
71 {
72 case 0:
74
75 if (valid_prescaler)
76 LPC_TIM0->PR = prescaler;
77
78 NVIC_EnableIRQ(TIMER0_IRQn);
79
80 if (valid_prio)
81 NVIC_SetPriority(TIMER0_IRQn, int_priority);
82 break;
83 case 1:
85
86 if (valid_prescaler)
87 LPC_TIM1->PR = prescaler;
88
89 NVIC_EnableIRQ(TIMER1_IRQn);
90
91 if (valid_prio)
92 NVIC_SetPriority(TIMER1_IRQn, int_priority);
93 break;
94 case 2:
96
97 if (valid_prescaler)
98 LPC_TIM2->PR = prescaler;
99
100 NVIC_EnableIRQ(TIMER2_IRQn);
101
102 if (valid_prio)
103 NVIC_SetPriority(TIMER2_IRQn, int_priority);
104 break;
105 case 3:
107
108 if (valid_prescaler)
109 LPC_TIM3->PR = prescaler;
110
111 NVIC_EnableIRQ(TIMER3_IRQn);
112
113 if (valid_prio)
114 NVIC_SetPriority(TIMER3_IRQn, int_priority);
115 break;
116 default:
117 timer = NULL; // Invalid timer number
118 }
119
120 timer->which = which;
121 timer->prescaler = prescaler;
122}
123
125{
126 TIMER_Disable(timer);
127 TIMER_Reset(timer);
128
129 switch (timer.which)
130 {
131 case 0:
133
134 LPC_TIM0->PR = 0;
135 clear_match_regs(LPC_TIM0);
136 NVIC_DisableIRQ(TIMER0_IRQn);
137 break;
138 case 1:
140
141 LPC_TIM1->PR = 0;
142 clear_match_regs(LPC_TIM1);
143 NVIC_DisableIRQ(TIMER1_IRQn);
144 break;
145 case 2:
147
148 LPC_TIM2->PR = 0;
149 clear_match_regs(LPC_TIM2);
150 NVIC_DisableIRQ(TIMER2_IRQn);
151 break;
152 case 3:
154
155 LPC_TIM3->PR = 0;
156 clear_match_regs(LPC_TIM3);
157 NVIC_DisableIRQ(TIMER3_IRQn);
158 break;
159 }
160}
161
163{
164 if (match_reg.which >= MR_COUNT || match_reg.which < 0)
165 return;
166
167 switch (timer.which)
168 {
169 case 0:
170 set_match_reg(LPC_TIM0, match_reg);
171 break;
172 case 1:
173 set_match_reg(LPC_TIM1, match_reg);
174 break;
175 case 2:
176 set_match_reg(LPC_TIM2, match_reg);
177 break;
178 case 3:
179 set_match_reg(LPC_TIM3, match_reg);
180 break;
181 }
182}
183
185{
186 switch (timer.which)
187 {
188 case 0:
189 unset_match_reg(LPC_TIM0, match_reg);
190 break;
191 case 1:
192 unset_match_reg(LPC_TIM1, match_reg);
193 break;
194 case 2:
195 unset_match_reg(LPC_TIM2, match_reg);
196 break;
197 case 3:
198 unset_match_reg(LPC_TIM3, match_reg);
199 break;
200 }
201}
202
204{
205 // NB: Check if the reset bit is set in TCR. If so,
206 // clear it otherwise the timer will never start.
207
208 switch (timer.which)
209 {
210 case 0:
211 CLR_BIT(LPC_TIM0->TCR, 1); // Clear reset bit
212 SET_BIT(LPC_TIM0->TCR, 0);
213 break;
214 case 1:
215 CLR_BIT(LPC_TIM1->TCR, 1);
216 SET_BIT(LPC_TIM1->TCR, 0);
217 break;
218 case 2:
219 CLR_BIT(LPC_TIM2->TCR, 1);
220 SET_BIT(LPC_TIM2->TCR, 0);
221 break;
222 case 3:
223 CLR_BIT(LPC_TIM3->TCR, 1);
224 SET_BIT(LPC_TIM3->TCR, 0);
225 break;
226 }
227}
228
230{
231 switch (timer.which)
232 {
233 case 0:
234 CLR_BIT(LPC_TIM0->TCR, 0);
235 break;
236 case 1:
237 CLR_BIT(LPC_TIM1->TCR, 0);
238 break;
239 case 2:
240 CLR_BIT(LPC_TIM2->TCR, 0);
241 break;
242 case 3:
243 CLR_BIT(LPC_TIM3->TCR, 0);
244 break;
245 }
246}
247
249{
250 switch (timer.which)
251 {
252 case 0:
253 return IS_BIT_SET(LPC_TIM0->TCR, 0);
254 case 1:
255 return IS_BIT_SET(LPC_TIM1->TCR, 0);
256 case 2:
257 return IS_BIT_SET(LPC_TIM2->TCR, 0);
258 case 3:
259 return IS_BIT_SET(LPC_TIM3->TCR, 0);
260 }
261
262 return false;
263}
264
266{
267 // Reset: bit 1 in TCR (bit 0 is left untouched)
268 switch (timer.which)
269 {
270 case 0:
271 SET_BIT(LPC_TIM0->TCR, 1);
272 break;
273 case 1:
274 SET_BIT(LPC_TIM1->TCR, 1);
275 break;
276 case 2:
277 SET_BIT(LPC_TIM2->TCR, 1);
278 break;
279 case 3:
280 SET_BIT(LPC_TIM3->TCR, 1);
281 break;
282 }
283}
284
286{
287 switch (timer.which)
288 {
289 case 0:
290 return LPC_TIM0->TC;
291 case 1:
292 return LPC_TIM1->TC;
293 case 2:
294 return LPC_TIM2->TC;
295 case 3:
296 return LPC_TIM3->TC;
297 }
298
299 return 0;
300}
301
void POWER_TurnOffPeripheral(u8 bit)
Turns off a peripheral.
Definition power.c:30
void POWER_TurnOnPeripheral(u8 bit)
Turns on a peripheral.
Definition power.c:25
@ POW_PCTIM3
Definition power_types.h:23
@ POW_PCTIM0
Definition power_types.h:14
@ POW_PCTIM2
Definition power_types.h:22
@ POW_PCTIM1
Definition power_types.h:15
u8 which
Definition timer_types.h:44
u32 prescaler
Definition timer_types.h:45
_PRIVATE void unset_match_reg(LPC_TIM_TypeDef *const timer, const TIMER_MatchRegister match_reg)
Definition timer.c:30
void TIMER_UnsetMatch(TIMER timer, TIMER_MatchRegister match_reg)
Unsets a match register of a TIMER peripheral.
Definition timer.c:184
void TIMER_Reset(TIMER timer)
Resets a TIMER peripheral without deconfiguring it.
Definition timer.c:265
u32 TIMER_ReadValue(TIMER timer)
Reads the current value of a TIMER peripheral.
Definition timer.c:285
void TIMER_Init(TIMER *timer, u8 which, u32 prescaler, u8 int_priority)
Initializes a TIMER peripheral.
Definition timer.c:62
void TIMER_Disable(TIMER timer)
Disables a TIMER peripheral.
Definition timer.c:229
void TIMER_Enable(TIMER timer)
Enables a TIMER peripheral.
Definition timer.c:203
_PRIVATE void clear_match_regs(LPC_TIM_TypeDef *const timer)
Definition timer.c:51
bool TIMER_IsEnabled(TIMER timer)
Checks if a TIMER peripheral is enabled.
Definition timer.c:248
_PRIVATE void set_match_reg(LPC_TIM_TypeDef *const timer, const TIMER_MatchRegister match_reg)
Definition timer.c:9
void TIMER_Deinit(TIMER timer)
Deconfigures a TIMER peripheral (also match registers).
Definition timer.c:124
void TIMER_SetMatch(TIMER timer, TIMER_MatchRegister match_reg)
Sets the match value for a match register of a TIMER peripheral.
Definition timer.c:162
#define MR_COUNT
Definition timer_types.h:7
#define IS_BIT_SET(reg, bit)
Definition types.h:24
#define CLR_BIT(reg, bit)
Definition types.h:27
#define IS_NO_PRESCALER(presc)
Definition types.h:43
#define SET_BIT(reg, bit)
Definition types.h:26
#define IS_DEF_PRIORITY(prio)
Definition types.h:42
uint8_t u8
Definition types.h:8
#define _PRIVATE
Definition types.h:37
#define IS_BETWEEN_EQ(value, low, hi)
Definition types.h:23
uint32_t u32
Definition types.h:6